Template 2: KiCad & Altium Professional Template

Project Directory Structure

# Professional KiCad 8 project template structure
# Designed for version control (Git) and team collaboration

cat << 'EOF'
project-name/
├── README.md                    # Project overview, BOM summary
├── .gitignore                   # KiCad backup/autosave exclusions
├── Makefile                     # Automated Gerber/BOM/DRC targets
│
├── hardware/
│   ├── project-name.kicad_pro   # KiCad project file
│   ├── project-name.kicad_sch   # Root schematic (hierarchical)
│   ├── power.kicad_sch          # Power supply sub-sheet
│   ├── mcu.kicad_sch            # MCU + crystal + decoupling
│   ├── interfaces.kicad_sch     # USB, UART, SPI, I2C connectors
│   ├── project-name.kicad_pcb   # PCB layout
│   └── fp-lib-table             # Local footprint library paths
│
├── libraries/
│   ├── symbols/
│   │   ├── project-parts.kicad_sym     # Custom schematic symbols
│   │   └── project-connectors.kicad_sym
│   ├── footprints/
│   │   └── project-parts.pretty/       # Custom footprints (.kicad_mod)
│   └── 3d-models/
│       └── *.step                       # STEP files for 3D viewer
│
├── manufacturing/
│   ├── gerbers/                  # Generated Gerber + drill files
│   ├── assembly/                 # BOM, CPL, pick-and-place
│   └── stencil/                  # Paste layer for stencil order
│
├── documentation/
│   ├── schematic-pdf/            # Exported schematic PDFs
│   ├── assembly-drawing/         # Assembly instructions
│   └── design-review/            # Review checklists, notes
│
├── simulation/
│   ├── spice/                    # LTspice/ngspice netlists
│   └── signal-integrity/         # S-parameter, eye diagrams
│
└── firmware/
    └── bringup/                  # Minimal bring-up firmware
        ├── main.c
        └── Makefile
EOF

Design Rules Configuration

# Design Rule Set comparison — JLCPCB vs OSHPark vs production-grade
# Use this to configure DRC in KiCad or Altium

import numpy as np

rules = {
    "Parameter": [
        "Min trace width",
        "Min trace spacing",
        "Min via drill",
        "Min via annular ring",
        "Min PTH drill",
        "Min PTH annular ring",
        "Min silkscreen width",
        "Min silkscreen clearance",
        "Solder mask expansion",
        "Board edge clearance",
        "Copper to edge",
        "Min hole-to-hole",
    ],
    "JLCPCB (Standard)": [
        "0.127 mm (5 mil)",
        "0.127 mm (5 mil)",
        "0.30 mm (12 mil)",
        "0.15 mm (6 mil)",
        "0.30 mm (12 mil)",
        "0.20 mm (8 mil)",
        "0.15 mm (6 mil)",
        "0.15 mm",
        "0.05 mm",
        "0.30 mm",
        "0.25 mm",
        "0.50 mm",
    ],
    "OSHPark (4-layer)": [
        "0.127 mm (5 mil)",
        "0.127 mm (5 mil)",
        "0.254 mm (10 mil)",
        "0.178 mm (7 mil)",
        "0.254 mm (10 mil)",
        "0.178 mm (7 mil)",
        "0.15 mm (6 mil)",
        "0.15 mm",
        "0.05 mm",
        "0.38 mm",
        "0.25 mm",
        "0.50 mm",
    ],
    "Production (IPC-2)": [
        "0.100 mm (4 mil)",
        "0.100 mm (4 mil)",
        "0.20 mm (8 mil)",
        "0.125 mm (5 mil)",
        "0.25 mm (10 mil)",
        "0.15 mm (6 mil)",
        "0.10 mm (4 mil)",
        "0.10 mm",
        "0.05 mm",
        "0.50 mm",
        "0.25 mm",
        "0.50 mm",
    ],
}

print("Design Rule Set Comparison")
print("=" * 78)
header = f"{'Parameter':<24} {'JLCPCB':<18} {'OSHPark':<18} {'Production':<18}"
print(header)
print("-" * 78)
for i in range(len(rules["Parameter"])):
    print(f"{rules['Parameter'][i]:<24} "
          f"{rules['JLCPCB (Standard)'][i]:<18} "
          f"{rules['OSHPark (4-layer)'][i]:<18} "
          f"{rules['Production (IPC-2)'][i]:<18}")

Library Management

# Component library management — KiCad symbol + footprint conventions
# Following IPC-7351B naming for footprints

echo "=== Component Library Naming Convention ==="
echo ""
echo "SYMBOL NAMING:"
echo "  Resistors:     R_0402, R_0603, R_0805"
echo "  Capacitors:    C_0402, C_0603, C_0805"
echo "  ICs:           STM32F446RE_LQFP100"
echo "  Connectors:    USB_C_Receptacle, Header_2x20"
echo "  Crystals:      Crystal_SMD_3215"
echo ""
echo "FOOTPRINT NAMING (IPC-7351B):"
echo "  RESC1005X40   — 0402 resistor/cap"
echo "  RESC1608X55   — 0603 resistor/cap"
echo "  RESC2012X65   — 0805 resistor/cap"
echo "  QFP80P1200X1200X120-100  — LQFP-100"
echo ""
echo "LIBRARY STRUCTURE:"
echo "  symbols/"
echo "    project-passives.kicad_sym    — R, C, L, ferrites"
echo "    project-ics.kicad_sym         — MCU, regulators, sensors"
echo "    project-connectors.kicad_sym  — USB, headers, debug"
echo "    project-discretes.kicad_sym   — LEDs, diodes, transistors"
echo ""
echo "REQUIRED FIELDS PER SYMBOL:"
echo "  Reference     — R1, C1, U1, J1"
echo "  Value         — 10k, 100nF, STM32F446RE"
echo "  Footprint     — linked to .pretty library"
echo "  Datasheet     — URL to manufacturer datasheet"
echo "  MPN           — Manufacturer part number"
echo "  Supplier      — DigiKey/Mouser/LCSC part number"
echo "  DNP           — Do Not Populate flag (optional)"

CI/CD Integration

# GitHub Actions CI/CD for KiCad projects
# Automated DRC, ERC, Gerber generation, BOM export on every push

cat << 'YAML'
# .github/workflows/hardware-ci.yml
name: Hardware CI

on:
  push:
    paths: ['hardware/**', 'libraries/**']
  pull_request:
    paths: ['hardware/**', 'libraries/**']

jobs:
  design-checks:
    runs-on: ubuntu-latest
    container:
      image: ghcr.io/inti-cmnb/kicad8_auto:latest

    steps:
      - uses: actions/checkout@v4

      - name: Run ERC (Electrical Rules Check)
        run: |
          kicad-cli sch erc \
            --output manufacturing/erc-report.json \
            --format json \
            hardware/project-name.kicad_sch

      - name: Run DRC (Design Rules Check)
        run: |
          kicad-cli pcb drc \
            --output manufacturing/drc-report.json \
            --format json \
            hardware/project-name.kicad_pcb

      - name: Generate Gerbers
        run: |
          kicad-cli pcb export gerbers \
            --output manufacturing/gerbers/ \
            hardware/project-name.kicad_pcb
          kicad-cli pcb export drill \
            --output manufacturing/gerbers/ \
            hardware/project-name.kicad_pcb

      - name: Export BOM
        run: |
          kicad-cli sch export bom \
            --output manufacturing/assembly/bom.csv \
            hardware/project-name.kicad_sch

      - name: Export Schematic PDF
        run: |
          kicad-cli sch export pdf \
            --output documentation/schematic-pdf/schematic.pdf \
            hardware/project-name.kicad_sch

      - name: Upload Artifacts
        uses: actions/upload-artifact@v4
        with:
          name: manufacturing-files
          path: manufacturing/
YAML

EDA Configuration Generator

Conclusion

A well-structured EDA project template eliminates setup overhead, enforces design standards across teams, and enables automated quality checks via CI/CD. Whether using KiCad (open-source) or Altium (enterprise), the principles remain identical: consistent naming, version-controlled libraries, automated DRC/ERC, and reproducible manufacturing outputs.