Part 4: Schematic Design

From Breadboard to Schematic

In Parts 1–3 you built working prototypes on breadboards and understood MCU peripherals. Now it’s time to translate those loose wires into a professional schematic — the blueprint that every PCB, manufacturing file, and design review depends on. A well-drawn schematic is the single most important document in a hardware project.

The Schematic Design Workflow

flowchart LR
    A[Requirements] --> B[Block Diagram]
    B --> C[Component Selection]
    C --> D[Schematic Capture]
    D --> E[ERC Check]
    E --> F[Design Review]
    F --> G[Netlist Export]
    G --> H[PCB Layout]
                            

Every schematic project follows this flow. The requirements document from your prototype tells you which peripherals, voltage rails, and connectors you need. The block diagram partitions the design into logical sheets. Component selection locks down exact part numbers. Schematic capture wires everything together. The Electrical Rules Check (ERC) catches wiring errors before you commit to copper.

EDA Tool Landscape

Electronic Design Automation (EDA) tools are your primary workspace. Each has trade-offs in cost, capability, and learning curve.

KiCad — Open-Source Professional Tool

KiCad 8 is a fully capable, free, open-source EDA suite used by hobbyists and professionals alike. It includes schematic capture, PCB layout, 3D viewer, SPICE simulation, and Gerber export — everything you need for a complete design.

Creating a new KiCad project follows a simple terminal + GUI workflow:

# Create project directory structure
mkdir -p ~/hardware/iot-sensor-v1/{schematics,pcb,gerbers,docs}
cd ~/hardware/iot-sensor-v1

# Initialise KiCad project (creates .kicad_pro, .kicad_sch, .kicad_pcb)
# Open KiCad GUI → File → New Project → select project folder

# Verify project files
ls -la *.kicad_*
# Expected: iot-sensor-v1.kicad_pro  iot-sensor-v1.kicad_sch  iot-sensor-v1.kicad_pcb

$ mkdir -p ~/hardware/iot-sensor-v1/{schematics,pcb,gerbers,docs}
$ cd ~/hardware/iot-sensor-v1
$ ls -la *.kicad_*
-rw-r--r--  1 user  staff   423 Apr 17 09:14 iot-sensor-v1.kicad_pro
-rw-r--r--  1 user  staff  1847 Apr 17 09:14 iot-sensor-v1.kicad_sch
-rw-r--r--  1 user  staff   952 Apr 17 09:14 iot-sensor-v1.kicad_pcb

Altium Designer — Industry Standard

Altium Designer is the dominant commercial EDA tool in professional hardware teams. It excels at multi-channel designs, variant management, and tight PLM (Product Lifecycle Management) integration. The learning curve is steeper, but the productivity payoff is significant for complex products.

EasyEDA & Other Tools

EasyEDA is a browser-based EDA tool tightly integrated with JLCPCB’s component library and assembly service. It’s excellent for quick prototypes where you want one-click ordering. Other notable tools include Fusion 360 Electronics (formerly EAGLE), Cadence OrCAD, and Mentor PADS.

The Broader EDA Ecosystem

Electronic Design Automation (EDA) is a multi-billion-dollar industry. While KiCad and Altium dominate PCB design, the EDA landscape extends far beyond board-level work into integrated circuit (IC) design, physical verification, and silicon signoff. Understanding the full ecosystem helps you make informed tool choices and communicate with IC and ASIC teams.

EDA Tool Categories

EDA tools fall into four broad categories, each serving a different stage of the design-to-manufacturing pipeline:

flowchart LR
    A["Design & Simulation\nSPICE, schematic capture,\nmixed-signal simulation"] --> B["Synthesis\nRTL → gate-level netlist\n(Synopsys DC, Cadence Genus)"]
    B --> C["Layout & Implementation\nPCB routing, IC place-and-route,\nfloorplanning"]
    C --> D["Verification & Signoff\nDRC, LVS, timing analysis\n(Calibre, PrimeTime)"]
                            

• Design & Simulation: Schematic capture, SPICE circuit simulation, behavioural modelling. Test analog, digital, and mixed-signal circuits before physical prototyping. (LTspice, ngspice, Cadence Virtuoso AMS)
• Synthesis: Translate high-level hardware description (RTL in Verilog/VHDL) into a gate-level netlist of standard cells. Relevant for ASIC and FPGA design. (Synopsys Design Compiler, Cadence Genus)
• Layout & Implementation: Create the physical geometry — component placement, trace routing for PCBs, or place-and-route for ICs. (KiCad, Altium, Cadence Innovus)
• Verification & Signoff: Ensure the design meets manufacturing and functional constraints. Design Rule Check (DRC) catches fabrication violations. Layout vs. Schematic (LVS) confirms the layout matches the intended circuit. Timing analysis verifies signal propagation meets clock requirements. (Siemens Calibre, Synopsys IC Validator, Synopsys PrimeTime)

Hierarchical Schematics

Real-world schematics rarely fit on a single sheet. Hierarchical design splits your circuit into logical modules — each on its own sheet — connected through hierarchical pins and net labels. This mirrors how software engineers organise code into modules.

Sheet Organisation Strategy

flowchart TD
    ROOT[Root Sheet: Top-Level Block Diagram] --> PWR[Power Sheet: USB 5V → LDO 3.3V → Filtering]
    ROOT --> MCU[MCU Sheet: STM32 + Crystal + Reset + Decoupling]
    ROOT --> SENS[Sensor Sheet: I2C Sensors + Connectors]
    ROOT --> COMM[Communication Sheet: WiFi/BLE Module + Antenna]
    ROOT --> DBG[Debug Sheet: SWD Header + UART Console + LEDs]
    ROOT --> PROT[Protection Sheet: ESD + TVS + Fuses]
                            

Each sheet has a clear responsibility. The root sheet shows the high-level interconnections. Child sheets contain the detailed circuitry. This makes design reviews efficient — the power engineer reviews the power sheet, the firmware engineer reviews the MCU sheet, and so on.

Power Flags & Net Labels

Net labels are the “wires” that connect signals across sheets without drawing physical lines. In KiCad, a net label on one sheet is automatically connected to every net label with the same name on every other sheet. Power flags (PWR_FLAG) tell the ERC that a net is intentionally driven by a power source.

# Common net label naming conventions
# Power rails:  +3V3, +5V, +12V, GND, VBAT, VBUS
# Data buses:   SDA, SCL, MOSI, MISO, SCK, CS_SENSOR
# Control:      nRESET, BOOT0, LED_STATUS, UART_TX, UART_RX
# Clocks:       HSE_IN, HSE_OUT, CLK_32K

# The 'n' prefix means active-low: nRESET, nCS, nIRQ
# Use UPPERCASE for net labels (industry convention)

Design Rule Checks (ERC)

The Electrical Rules Check scans your schematic for common errors: unconnected pins, conflicting net assignments, missing power flags, and pin-type conflicts (e.g., two outputs driving the same net). Always run ERC before exporting the netlist.

Component Selection & Lifecycle

Choosing the right component is more than finding one that meets the spec. You must consider availability, lifecycle status, package size, thermal performance, and cost at volume. A component that goes end-of-life (EOL) mid-production can derail an entire product.

Lifecycle & Sourcing Strategy

stateDiagram-v2
    [*] --> Introduction : New part released
    Introduction --> Growth : Broad adoption
    Growth --> Maturity : Peak availability
    Maturity --> Decline : Reduced production
    Decline --> EOL : End of Life
    EOL --> Obsolete : No longer manufactured
    Maturity --> NRND : Not Recommended for New Designs
    NRND --> EOL
                            

Always check lifecycle status before committing to a part. Use these resources:

• DigiKey / Mouser: Part detail pages show “Active”, “NRND”, or “Obsolete” status
• Octopart: Aggregates stock levels and lifecycle data across distributors
• Manufacturer product change notifications (PCNs): Sign up for alerts on critical parts
• JLCPCB parts library: Shows in-stock parts ready for assembly

Package & Footprint Selection

The component package determines your PCB footprint, thermal performance, and assembly difficulty. For prototyping, larger packages (0805, SOIC) are easier to hand-solder. For production, smaller packages (0402, QFN) save board space and cost.

Derating & Tolerances

Never operate a component at its absolute maximum rating. Derating extends lifetime and prevents failures. Industry standard is to use components at 50–80% of their rated values.

import math

# Component derating calculator
rated_voltage = 16  # Capacitor rated at 16V
derating_factor = 0.7  # 70% derating (recommended for MLCC)

max_operating_voltage = rated_voltage * derating_factor
print(f"Rated: {rated_voltage}V")
print(f"Derating factor: {derating_factor * 100}%")
print(f"Max operating voltage: {max_operating_voltage}V")

# For a 3.3V rail, 16V cap is fine (3.3V / 11.2V = 29% utilisation)
# For a 12V rail, you need at least 12V / 0.7 = 17.1V → use 25V cap
required_voltage = 12
min_rated = required_voltage / derating_factor
print(f"\nFor {required_voltage}V rail:")
print(f"Minimum rated voltage: {math.ceil(min_rated)}V")
print(f"Recommended: 25V rated capacitor")

Rated: 16V
Derating factor: 70.0%
Max operating voltage: 11.2V

For 12V rail:
Minimum rated voltage: 18V
Recommended: 25V rated capacitor

Power Supply Design

Every embedded system needs clean, stable power. The choice between an LDO (Low-Dropout Regulator) and a buck converter depends on your input/output voltage difference, current requirements, and noise sensitivity.

LDO Regulators

An LDO is a linear regulator that provides a lower, regulated output voltage. It’s simple (often just 3 external components), low-noise, and ideal when the input-output voltage difference is small.

flowchart LR
    VBUS["VBUS 5V"] --> C1["C_in 10µF"]
    VBUS --> LDO["AMS1117-3.3"]
    LDO --> VOUT["3.3V Rail"]
    VOUT --> C2["C_out 22µF"]
    LDO --> GND["GND"]
                            

import math

# LDO power dissipation calculator
v_in = 5.0          # USB input voltage
v_out = 3.3          # Regulated output
i_load = 0.3         # 300mA load current
dropout = 0.5        # Typical LDO dropout voltage

# Check: is input high enough?
headroom = v_in - v_out
print(f"Headroom: {headroom:.1f}V (need > {dropout}V dropout)")
print(f"Margin OK: {headroom > dropout}")

# Power dissipated as heat in the LDO
p_dissipated = (v_in - v_out) * i_load
print(f"\nPower dissipated: {p_dissipated:.2f}W = {p_dissipated * 1000:.0f}mW")

# Efficiency (linear regulator)
efficiency = (v_out / v_in) * 100
print(f"Efficiency: {efficiency:.1f}%")

# Junction temperature estimate (SOT-223 package)
theta_ja = 90  # °C/W (SOT-223 thermal resistance)
t_ambient = 25
t_junction = t_ambient + (p_dissipated * theta_ja)
print(f"\nJunction temperature: {t_junction:.1f}°C")
print(f"Safe? {t_junction < 125} (max 125°C)")

Headroom: 1.7V (need > 0.5V dropout)
Margin OK: True

Power dissipated: 0.51W = 510mW
Efficiency: 66.0%

Junction temperature: 70.9°C
Safe? True (max 125°C)

Buck (Step-Down) Converters

A buck converter is a switching regulator that converts higher voltage to lower voltage with much better efficiency than an LDO. The trade-off is increased complexity (inductor, diode, feedback resistors) and switching noise.

flowchart LR
    VIN["V_IN 12V"] --> SW["Switching IC"]
    SW --> L["Inductor 10µH"]
    L --> VOUT["V_OUT 3.3V"]
    SW --> D["Schottky Diode"]
    D --> GND["GND"]
    VOUT --> FB["Feedback Divider"]
    FB --> SW
    VOUT --> COUT["C_out 47µF"]
    VIN --> CIN["C_in 10µF"]
                            

import math

# Buck converter feedback divider calculator
# V_OUT = V_REF × (1 + R1/R2)  where V_REF is typically 0.8V
v_out_target = 3.3   # Desired output voltage
v_ref = 0.8          # Internal reference (check datasheet)

# Choose R2 first (typically 10kΩ - 100kΩ)
r2 = 10_000  # 10kΩ

# Calculate R1
r1 = r2 * ((v_out_target / v_ref) - 1)
print(f"Target V_OUT: {v_out_target}V")
print(f"V_REF: {v_ref}V")
print(f"R2: {r2/1000:.0f}kΩ")
print(f"R1 (calculated): {r1/1000:.1f}kΩ")

# Find nearest standard resistor (E96 series)
e96_values = [31.6, 32.4, 33.2]  # kΩ values near calculated
print(f"Nearest E96: {min(e96_values, key=lambda x: abs(x - r1/1000))}kΩ")

# Verify with standard value
r1_actual = 31.6e3
v_out_actual = v_ref * (1 + r1_actual / r2)
print(f"\nActual V_OUT: {v_out_actual:.3f}V")
print(f"Error: {abs(v_out_actual - v_out_target) / v_out_target * 100:.2f}%")

# Efficiency comparison vs LDO
v_in = 12.0
i_load = 0.5  # 500mA

ldo_eff = (v_out_target / v_in) * 100
buck_eff = 88  # Typical for a well-designed buck
ldo_heat = (v_in - v_out_target) * i_load
buck_heat = v_out_target * i_load * (1 - buck_eff/100)

print(f"\n--- 12V→3.3V @ 500mA comparison ---")
print(f"LDO efficiency: {ldo_eff:.1f}% → {ldo_heat:.2f}W heat")
print(f"Buck efficiency: ~{buck_eff}% → {buck_heat:.3f}W heat")

Target V_OUT: 3.3V
V_REF: 0.8V
R2: 10kΩ
R1 (calculated): 31.2kΩ
Nearest E96: 31.6kΩ

Actual V_OUT: 3.328V
Error: 0.85%

--- 12V→3.3V @ 500mA comparison ---
LDO efficiency: 27.5% → 4.35W heat
Buck efficiency: ~88% → 0.198W heat

Power Tree & Sequencing

A power tree diagram shows every voltage rail in your system, how it’s generated, and what loads it feeds. Complex systems may require power sequencing — turning on rails in a specific order to prevent latch-up or brown-out conditions.

flowchart TD
    USB["USB 5V / Battery 3.7V"] --> BUCK["Buck: 5V → 3.3V_MAIN"]
    BUCK --> MCU["STM32 (200mA)"]
    BUCK --> WIFI["WiFi Module (350mA peak)"]
    BUCK --> LDO_A["LDO: 3.3V → 1.8V_CORE"]
    LDO_A --> CORE["MCU Core (50mA)"]
    USB --> CHG["Battery Charger IC"]
    CHG --> BAT["Li-Po 3.7V"]
    BUCK --> LDO_B["LDO: 3.3V → 3.0V_ANALOG"]
    LDO_B --> ADC["ADC Reference (10mA)"]
    LDO_B --> SENSOR["Analog Sensors (20mA)"]
                            

Protection Circuits

Protection circuits are the insurance policy of your hardware design. They cost pennies but prevent catastrophic failures from ESD events, reverse polarity connections, and overcurrent conditions.

ESD Protection

Electrostatic Discharge (ESD) can deliver thousands of volts in nanoseconds, destroying sensitive IC inputs. Every external-facing pin — USB, GPIO headers, antenna — needs ESD protection.

/*
 * ESD protection placement in KiCad schematic
 * 
 * USB connector → TVS array → USB controller
 *
 * Part: USBLC6-2SC6 (SOT-23-6)
 * - Ultra-low capacitance (2pF) for USB 2.0 High Speed
 * - IEC 61000-4-2 Level 4 (±8kV contact, ±15kV air)
 * - Place as CLOSE to connector as possible
 *
 * Schematic net connections:
 *   Pin 1 (I/O1)  → USB_DP   (D+ data line)
 *   Pin 2 (GND)   → GND
 *   Pin 3 (I/O2)  → USB_DP   (after TVS)
 *   Pin 4 (I/O3)  → USB_DM   (after TVS)
 *   Pin 5 (VBUS)  → VBUS     (clamp reference)
 *   Pin 6 (I/O4)  → USB_DM   (D- data line)
 */

Reverse Polarity Protection

Users will inevitably connect batteries or barrel jacks backwards. There are three common protection approaches, each with different trade-offs:

Overcurrent & Thermal Protection

Overcurrent protection prevents excessive current from damaging your board or causing fires. Options include fuses (one-shot), PTC resettable fuses (self-healing), and electronic current limiters.

import math

# Fuse selection calculator
max_normal_current = 0.5  # 500mA normal operating current
derating = 0.75           # 75% derating for reliability
ambient_temp = 40         # Worst-case ambient temperature

# Fuse rating = max current / derating factor
fuse_rating = max_normal_current / derating
print(f"Normal current: {max_normal_current * 1000:.0f}mA")
print(f"Derating: {derating * 100}%")
print(f"Minimum fuse rating: {fuse_rating * 1000:.0f}mA")
print(f"Recommended: 750mA or 1A slow-blow fuse")

# I²t (energy let-through) check for semiconductor protection
i_fault = 5.0    # Fault current in amps
t_blow = 0.01    # Fuse blow time in seconds
i2t_fuse = i_fault ** 2 * t_blow
print(f"\nI²t let-through: {i2t_fuse:.3f} A²s")
print(f"Check: IC I²t rating must be > {i2t_fuse:.3f} A²s")

Normal current: 500mA
Derating: 75%
Minimum fuse rating: 667mA
Recommended: 750mA or 1A slow-blow fuse

I²t let-through: 0.250 A²s
Check: IC I²t rating must be > 0.250 A²s

Exercises

Exercises

Schematic Review Checklist Tool

Use this interactive tool to perform a systematic schematic review before moving to PCB layout. Download the checklist as a reference document.

Conclusion & Next Steps

You now understand the complete schematic design workflow — from choosing an EDA tool and organising hierarchical sheets, through component selection with lifecycle awareness, to power supply design and protection circuits. Your schematics are the foundation of everything that follows: PCB layout, manufacturing, and compliance testing.